1. Field of the Invention
This invention relates generally to an alignment method and apparatus for aligning an article and more particularly to alignment usable for instance in the fabrication of semiconductor devices such as integrated circuits for aligning a mask having a pattern thereon with a wafer.
2. Description of the Prior Art
Projection exposure apparatuses used in the manufacture of semiconductor devices, for projecting images of a pattern of a reticle upon different portions of the surface of a wafer in sequence by use of a projection lens systems, generally include an alignment system wherein, for aligning the reticle and the wafer prior to the projection exposure, a light is projected from the projection lens system side onto an alignment mark formed on the wafer surface. Such alignment light is diffracted by the features of the wafer alignment mark and the diffracted light is detected by a photoelectric detector, whereby an alignment signal representing the position of the wafer is obtained.
Typical prior art alignment involves topside alignment using a number of sets of marks, e.g. depressions, formed in the top (principal) surface of a wafer. However, problematically later processing steps blur or obliterate these marks and/or cover them up with other semiconductor layers, e.g. polysilicon structures, metallization, oxides, etc. This blurring or covering up typically requires forming new secondary alignment marks in the upper semiconductor layers; however these secondary marks are then typically slightly shifted from the location of the original marks, leading to alignment degradation. Thus the processing operation to form the integrated circuit introduces asymmetries in the mark locations, leading to further systematic shifts of the apparent mark positions as well as reducing the image quality of the marks.
U.S. Pat. No. 4,952,060, issued Aug. 28, 1992 to Ina et al., incorporated herein by reference in its entirety, discloses a backside alignment scheme in which the alignment marks are formed either on the principal surface of the wafer or on the backside of the wafer. In either case, the alignment marks are detected from the backside (lower side) of the wafer. Since this backside typically does not have semiconductor processing performed on it, and the silicon wafer is transparent to certain wavelengths of illumination, the original so-called xe2x80x9cvirginxe2x80x9d marks formed on the front side of the wafer are always visible from the wafer backside, in spite of subsequent processing steps. Thus the alignment signals are obtainable without being affected by the processing of the principal (frontside) surface of the wafer, and the undesirable deterioration of alignment accuracy is avoided.
Present FIG. 1 (identical to FIG. 1 of Ina et al.) depicts such an apparatus for a step and repeat type reduction projection exposure system. Semiconductor wafer 1 (the workpiece) is held on a wafer chuck 9 mounted on a wafer stage 10. Stage 10 is an XY stage movable in the X and Y directions and driven by a wafer stage driving system 11. Reticle (mask) 4 (the original) has formed on its lower surface a pattern 20 to be transferred to each of the different areas (die) of the wafer 1. Also, alignment marks 21 and 21xe2x80x2 to be used for the alignment of the reticle 4 are located on reticle 4. Light sources 3 and 3xe2x80x2 provide light for the reticle alignment. A reticle stage 5 holds reticle 4 and is driven by a reticle stage driving system 6 to set the position of the reticle 4 in the X, Y and xcex8 (rotational) directions. Illumination system 7 illuminates reticle 4 since the pattern 20 on the reticle 4 is photoprinted on a resist layer provided on the wafer 1 upper surface. Projections lens system 8 images, on a reduced scale, the pattern 20 and the alignment marks 21 and 21xe2x80x2 of the reticle 4 on the wafer 1 upper surface.
When a new reticle 4 is placed on the reticle stage 5, the first step is to align the reticle 4. Without a wafer in place, the illuminators 3 and 3xe2x80x2 illuminate the reticle alignment marks 21 and 21xe2x80x2. The projection lens 8 places a reduced image at the plane of the missing wafer. The wafer chuck 9 is provided with throughbores (not shown) formed at positions corresponding to the alignment marks 22 and 22xe2x80x2 on the wafer or the images of the reticle alignment marks 21 and 21xe2x80x2 projected by the projection lens system 8. Alternatively the wafer chuck 9 is formed of a transparent glass material (quartz) instead of having the throughbores. The relay lens 14 (14xe2x80x2) reimages the reticle marks onto the reference plate members 13 and 13xe2x80x2. Thus the alignment detecting system 16 can reference the reticle marks to the wafer reference. The reticle stage is moved to improve the reference. Now the wafer can be aligned to the references 13 and 13xe2x80x2 and thus be aligned to the reticle marks 21 and 21xe2x80x2. This is only one of several ways that the reticle marks can be referenced to the wafer.
Light sources 12 and 12xe2x80x2 provide light to be used for the alignment of the wafer 1. Reference plate members 13 and 13xe2x80x2 each have formed thereon a reference mark 23 or 23xe2x80x2 and have been previously aligned to the corresponding one of the reticle alignment marks 21 and 21xe2x80x2 for the reticle alignment and for a corresponding one of the wafer alignment marks 22 and 22xe2x80x2 for the wafer alignment. Relay lenses 14 and 14xe2x80x2 each are movable in the direction of its optical axis. Reference mark 23 (23xe2x80x2) is provided for the position which is in the illustrated state, optically conjugate with the surface of the wafer chuck 9 with respect to the relay lens 14 (14xe2x80x2).
Alignment optical system 15 includes the above described relay lenses 14 and 14xe2x80x2, reference plate members 13 and 13xe2x80x2 etc. The alignment optical system 15 is arranged to project the alignment light emitted from the light sources 12 and 12xe2x80x2 upon reference marks 23 and 23xe2x80x2 respectively, and upon the wafer alignment marks 22 and 22xe2x80x2, respectively which are formed on either the front or the rear (backside or lower) surface of the wafer 1 and which are related to the current area to be exposed on the wafer 1. Thus by irradiation of these marks with light supplied from the light sources 12 and 12xe2x80x2, optical signals necessary for the wafer alignment are obtained in the form of diffracted or reflected light from the features of these marks.
The alignment optical system 15 detects optical signals concerning the reticle alignment marks 21 and 21xe2x80x2 as well as the reference marks 23 to 23xe2x80x2 for reticle alignment purposes. Alignment detection system 16 is provided to measure or detect any relative position of deviation between each wafer alignment mark and a corresponding one of the reference marks, or each reticle alignment mark and a corresponding one of the reference marks.
Clearly, it is necessary when the alignment marks are on the top surface of wafer 1 that the light used to illuminate them passes through the wafer 1. Since wafer 1 is typically of silicon, the disclosed light source is a carbon dioxide gas laser producing light of 10.31 microns wavelength.
While this system appears to have utility, it has not been put into commercial practice so far as is known. This may be because of a significant defect called herein wedging or tilting.
Semiconductor wafers are sawn from a cylinder bolus of silicon crystal. Since conventionally all wafer processing steps which require precision are performed on the principal (front) surface of each wafer, only that surface is typically provided to have a precision flat surface. That is, the backside surface may not be in a plane parallel to the frontside but may be slightly out of the plane, thus giving the wafer (in cross section) a slight wedge shape. It is to be understood that this wedge shape is only a slight deviation from the parallel plane. However, even a slight such wedge shape, in combination with the backside imaging described above, results in a significant alignment error as described in detail below.
In addition to the wedge problem, there is also a related tilt problem even when the wafer has two parallel surfaces. Frequently wafers are not held down tightly to the wafer chuck over their entire backside surface, but may be slightly tilted on the chuck due to locally poor chucking. This may be caused by small particles trapped between the wafer and chuck. The chucks used are typically vacuum chucks which depend on a number of perforations therethrough at which a vacuum is provided in order to hold down the wafer. Thus this tilting due to imperfect chucking results in a similar problem as described above, i.e. the backside of the wafer is not in a plane exactly perpendicular to the axis of the incident alignment light.
In accordance with the present invention, the above-described drawbacks of wafer alignment using backside wafer illumination have been solved. The wedging or tilting problem, in which the wafer backside surface is not normal to the incident alignment light beam, whereby refraction or reflection by the wafer shifts the apparent position of the alignment mark, is solved by using autocollimation from the backside wafer surface with a second beam of e.g. visible light. This allows the wafer tilt to be measured by reflecting the visible light from the backside surface of the wafer, thereby allowing measurement of and correction for the wafer tilting or wedging. Visible light is used in one embodiment to make sure that it is a wavelength both easily reflected from the wafer surface and which will not be detected by the detector which detects the e.g. infrared light diffracted by the alignment mark. Hence a second source of light and a second detector are provided for this autocollimation detection. In one embodiment a quadrant detector is used which measures the centroid of the incident beam of the visible light to high accuracy; hence very small deviations from the normal incidence of the visible light beam may be detected.
Also, in accordance with the present invention two particular XY stage embodiments allow access to the backside of the wafer for alignment purposes.
In addition to wedging, another consideration in using backside alignment of front surface marks is the effect of the wafer on the light which is reflected from it and transmitted through it. Because the index of refraction of silicon (the usual wafer material) is high at infrared wavelengths, approximately 30% of the light is reflected from the wafer backside surface. This will tend to lower image contrast somewhat. Also, the wafer backside surface may be covered by a thin film of silicon dioxide from an earlier process step. The effects of these properties will depend somewhat on the type of alignment detection used and is discussed below.
To some extent, the presence of the silicon wafer between the illumination source and the alignment marks is analogous to the presence of the thin layer (about 1 xcexcm thick) of resist (photoresist) covering the conventional top surface marks. Misalignment errors will occur there as well if the resist surface is not flat and parallel to the wafer surface.
Alignment systems can be characterized by whether they analyze an image of the mark in an optical plane conjugate to the plane of the mark, or whether they analyze the intensity pattern in the back focal plane of the final lens. The latter represents a Fourier transform of the mark pattern. For the latter case the signal comes from light diffracted by the mark. Since the diffracted light follows a different path than the incident light, multiple reflections within the wafer, as well as light reflected from the wafer back surface, will not interfere with the signal. This type of alignment technique requires an approximately monochromatic light source. Because there is no common path between incident and reflected (diffracted) light, the monochromaticity does not cause a problem. This type of mark detection will suffer if the mark itself is of poor quality. For example, it frequently has problems with alignment marks on metallization layers, where metallic grains several microns in size can cause severe speckle. In this case, there is enough scattered light to create interference with the diffracted light signal. This should not be a problem for backside alignment, since the zero level marks can be made to high quality without compromising any processing steps.
In the former case, incident and reflected light follow common paths, so interference can occur which can degrade the image. This can be avoided by increasing the bandwidth of the radiation, so that the coherence length of the light is less than the optical thickness of the wafer. This type of alignment would probably not be possible with the monochromatic source specified by Ina et al.
Reflections and scattered light from the backside surface of the wafer are another consideration. The silicon dioxide layer is an unintentional side product of various process steps, and its properties and homogeneity are not controlled. Degradation of the signal from these effects can be minimized by choosing the depth of focus of the imaging (projection) lens to be shorter than the wafer thickness. The back surface of the wafer will then be out of focus and will contribute little to the pattern structure.
In general, it may be expected that some combination of frontside (top surface) and backside alignment will be used. Therefore, calibration of the two types of alignment systems must be considered. This can be done using a special calibration mark or marks (fiducial marks) mounted on the wafer stage rather than marks on the wafer itself. These marks are on e.g. silicon plates of thickness comparable to a wafer and which are accessible from the backside, so that frontside and backside alignment can be carried out on the same high quality mark. The silicon plate has parallel surfaces and is aligned normal to the optical axis of the projection lens, so no offset error exists between the two alignment systems. The sensitivity of the backside alignment system to detecting wedging error can be calibrated by including patterns on plates with a controlled amount of wedge, or by tilting the stage using a separate actuator; such actuators are common on lithography machines.